* CoreSight Components

CoreSight components are compliant with the ARM CoreSight architecture
specification and can be connected in various topologies to suite a particular
SoCs tracing needs. These trace components can generally be classified as sinks,
links and sources. Trace data produced by one or more sources flows through the
intermediate links connecting the source to the currently selected sink. Each
CoreSight component device should use these properties to describe its hardware
characteristcs.

Required properties:

- compatible : name of the component used for driver matching, should be one of
	the following:
	"arm,coresight-tmc" for coresight tmc-etr or tmc-etf device,
	"arm,coresight-tpiu" for coresight tpiu device,
	"qcom,coresight-replicator" for coresight replicator device,
	"arm,coresight-funnel" for coresight funnel devices,
	"arm,coresight-stm" for coresight stm trace device,
	"arm,coresight-etm" for coresight etm trace devices,
	"qcom,coresight-csr" for coresight csr device,
	"arm,coresight-cti" for coresight cti devices,
	"qcom,coresight-hwevent" for coresight hardware event devices
	"arm,coresight-fuse" for coresight fuse device,
	"qcom,coresight-audio-etm" for coresight audio etm trace device,
	"qcom,coresight-modem-etm" for coresight modem etm trace device,
	"qcom,coresight-wcn-etm" for coresight wireless etm trace device,
	"qcom,coresight-rpm-etm" for coresight rpm etm trace device
- reg : physical base address and length of the register set(s) of the component.
	Not required for the following compatible strings:
	- "qcom,coresight-audio-etm",
	- "qcom,coresight-modem-etm",
	- "qcom,coresight-wcn-etm",
	- "qcom,coresight-rpm-etm"
- reg-names : names corresponding to each reg property value.
	Not required for the following compatible strings:
	- "qcom,coresight-audio-etm",
	- "qcom,coresight-modem-etm",
	- "qcom,coresight-wcn-etm",
	- "qcom,coresight-rpm-etm"
	The reg-names that need to be used with corresponding compatible string
	for a coresight device are:
	- for coresight tmc-etr or tmc-etf device:
		compatible : should be "arm,coresight-tmc"
		reg-names  : should be:
			"tmc-base" - physical base address of tmc configuration
				registers
			"bam-base" - physical base address of tmc-etr bam registers
	- for coresight tpiu device:
		compatible : should be "arm,coresight-tpiu"
		reg-names  : should be:
			"tpiu-base" - physical base address of tpiu registers
	- for coresight replicator device
		compatible : should be "qcom,coresight-replicator"
		reg-names  : should be:
			"replicator-base" - physical base address of replicator
				registers
	- for coresight funnel devices
		compatible : should be "arm,coresight-funnel"
		reg-names  : should be:
			"funnel-base" - physical base address of funnel registers
	- for coresight stm trace device
		compatible : should be "arm,coresight-stm"
		reg-names  : should be:
			"stm-base" - physical base address of stm configuration
				registers
			"stm-data-base" - physical base address of stm data registers
	- for coresight etm trace devices
		compatible : should be "arm,coresight-etm"
		reg-names  : should be:
			"etm-base" - physical base address of etm registers
	- for coresight csr device:
		compatible : should be "qcom,coresight-csr"
		reg-names  : should be:
			"csr-base" - physical base address of csr registers
	- for coresight cti devices:
		compatible : should be "arm,coresight-cti"
		reg-names  : should be:
			"cti<num>-base" - physical base address of cti registers
	- for coresight hardware event devices:
		compatible : should be "qcom,coresight-hwevent"
		reg-names  : should be:
			"<ss-mux>" - physical base address of hardware event mux
				control registers where <ss-mux> is subsystem mux it
				represents
	- for coresight fuse device:
		compatible : should be "arm,coresight-fuse"
		reg-names  : should be:
			"fuse-base" - physical base address of fuse registers
- coresight-id : unique integer identifier for the component
- coresight-name : unique descriptive name of the component
- coresight-nr-inports : number of input ports on the component

coresight-outports, coresight-child-list and coresight-child-ports lists will
be of the same length and will have a one to one correspondence among the
elements at the same list index.

coresight-default-sink must be specified for one of the sink devices that is
intended to be made the default sink. Other sink devices must not have this
specified. Not specifying this property on any of the sinks is invalid.

Optional properties:

- coresight-outports : list of output port numbers of this component
- coresight-child-list : list of phandles pointing to the children of this
			 component
- coresight-child-ports : list of input port numbers of the children
- coresight-default-sink : represents the default compile time CoreSight sink
- coresight-ctis : list of ctis that this component interacts with
- qcom,pc-save : program counter save implemented
- qcom,blk-size : block size for tmc-etr to usb transfers
- qcom,memory-size : size of coherent memory to be allocated for tmc-etr buffer
- qcom,round-robin : indicates if per core etms are allowed round-robin access
		     by the funnel
- qcom,reset-flush-race : indicates if a race exists between flushing and ddr
			  being put into self-refresh during watchdog reset
- qcom,write-64bit : only 64bit data writes supported by stm
- <supply-name>-supply: phandle to the regulator device tree node. The required
			<supply-name> is "vdd" for SD card and "vdd-io" for SD
			I/O supply. Used for tpiu component
- qcom,<supply>-voltage-level : specifies voltage level for vdd supply. Should
				be specified in pairs (min, max) with units
				being uV. Here <supply> can be "vdd" for SD card
				vdd supply or "vdd-io" for SD I/O vdd supply.
- qcom,<supply>-current-level : specifies current load levels for vdd supply.
				Should be specified in pairs (lpm, hpm) with
				units being uA. Here <supply> can be "vdd" for
				SD card vdd supply or "vdd-io" for SD I/O vdd
				supply.
- qcom,seta-gpios : specifies gpios included in set A that are routed to the
		    mictor connector. Used for tpiu component
- qcom,seta-gpios-func : active function select for set A gpios
- qcom,seta-gpios-drv : active drive strength for set A gpios
- qcom,seta-gpios-pull : active pull configuration for set A gpios
- qcom,seta-gpios-dir : active direction for set A gpios
- qcom,setb-gpios : specifies gpios included in set B that are routed to the
		    mictor connector. Used for tpiu component
- qcom,setb-gpios-func : active function select for set B gpios
- qcom,setb-gpios-drv : active drive strength for set B gpios
- qcom,setb-gpios-pull : active pull configuration for set B gpios
- qcom,setb-gpios-dir : active direction for set B gpios
- qcom,hwevent-clks : list of clocks required by hardware event driver
- qcom,byte-cntr-absent : specifies if the byte counter feature is absent on
			  the device. Only relevant in case of tmc-etr device.
- interrupts : <a b c> where a is 0 or 1 depending on if the interrupt is
		spi/ppi, b is the interrupt number and c is the mask,
- interrupt-names : a list of strings that map in order to the list of
		    interrupts specified in the 'interrupts' property.

Examples:

1. Sinks
	tmc_etr: tmc@fc322000 {
		compatible = "arm,coresight-tmc";
		reg = <0xfc322000 0x1000>,
		      <0xfc37c000 0x3000>;
		reg-names = "tmc-base", "bam-base";

		interrupts = <0 166 0>;
		interrupt-names = "byte-cntr-irq";

		qcom,byte-cntr-absent;
		qcom,memory-size = <0x100000>;

		coresight-id = <0>;
		coresight-name = "coresight-tmc-etr";
		coresight-nr-inports = <1>;
		coresight-default-sink;
	};

	tpiu: tpiu@fc318000 {
		compatible = "arm,coresight-tpiu";
		reg = <0xfc318000 0x1000>;
		reg-names = "tpiu-base";

		coresight-id = <1>;
		coresight-name = "coresight-tpiu";
		coresight-nr-inports = <1>;

		vdd-supply = <&pm8941_l21>;

		qcom,vdd-voltage-level = <2950000 2950000>;
		qcom,vdd-current-level = <9000 800000>;
	};

2. Links
	funnel_merg: funnel@fc31b000 {
		compatible = "arm,coresight-funnel";
		reg = <0xfc31b000 0x1000>;
		reg-names = "funnel-base";

		coresight-id = <4>;
		coresight-name = "coresight-funnel-merg";
		coresight-nr-inports = <2>;
		coresight-outports = <0>;
		coresight-child-list = <&tmc_etf>;
		coresight-child-ports = <0>;
	};

	funnel_in0: funnel@fc319000 {
		compatible = "arm,coresight-funnel";
		reg = <0xfc319000 0x1000>;
		reg-names = "funnel-base";

		coresight-id = <5>;
		coresight-name = "coresight-funnel-in0";
		coresight-nr-inports = <8>;
		coresight-outports = <0>;
		coresight-child-list = <&funnel_merg>;
		coresight-child-ports = <0>;
	};

3. Sources
	stm: stm@fc321000 {
		compatible = "arm,coresight-stm";
		reg = <0xfc321000 0x1000>,
		      <0xfa280000 0x180000>;
		reg-names = "stm-base", "stm-data-base";

		coresight-id = <9>;
		coresight-name = "coresight-stm";
		coresight-nr-inports = <0>;
		coresight-outports = <0>;
		coresight-child-list = <&funnel_in1>;
		coresight-child-ports = <7>;
	};

	etm0: etm@fc33c000 {
		compatible = "arm,coresight-etm";
		reg = <0xfc33c000 0x1000>;
		reg-names = "etm-base";

		coresight-id = <10>;
		coresight-name = "coresight-etm0";
		coresight-nr-inports = <0>;
		coresight-outports = <0>;
		coresight-child-list = <&funnel_kpss>;
		coresight-child-ports = <0>;
		qcom,pc-save;
		qcom,round-robin;
	};

4. Miscellaneous
	cti0: cti@fc308000 {
		compatible = "arm,coresight-cti";
		reg = <0xfc308000 0x1000>;
		reg-names = "cti-base";

		coresight-id = <15>;
		coresight-name = "coresight-cti0";
		coresight-nr-inports = <0>;
	};

	cti1: cti@fc309000 {
		compatible = "arm,coresight-cti";
		reg = <0xfc309000 0x1000>;
		reg-names = "cti-base";

		coresight-id = <16>;
		coresight-name = "coresight-cti1";
		coresight-nr-inports = <0>;
	};

	hwevent: hwevent@fdf30018 {
		compatible = "qcom,coresight-hwevent";
		reg = <0xfdf30018 0x80>,
		      <0xf9011080 0x80>,
		      <0xfd4ab160 0x80>,
		      <0xfc401600 0x80>;
		reg-names = "mmss-mux", "apcs-mux", "ppss-mux", "gcc-mux";

		coresight-id = <29>;
		coresight-name = "coresight-hwevent";
		coresight-nr-inports = <0>;

		qcom,hwevent-clks = "core_mmss_clk";
	};

	fuse: fuse@fc4be024 {
		compatible = "arm,coresight-fuse";
		reg = <0xfc4be024 0x8>;
		reg-names = "fuse-base";

		coresight-id = <30>;
		coresight-name = "coresight-fuse";
		coresight-nr-inports = <0>;
	};
